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general description the MAX1870a step-up/step-down multichemistry bat- tery charger charges with battery voltages above and below the adapter voltage. this highly integrated charger requires a minimum number of external compo- nents. the MAX1870a uses a proprietary step-up/step- down control scheme that provides efficient charging. analog inputs control charge current and voltage, and can be programmed by the host or hardwired. the MAX1870a accurately charges two to four lithium- ion (li+) series cells at greater than 4a. a programma- ble input current limit is included, which avoids overloading the ac adapter when supplying the load and the battery charger simultaneously. this reduces the maximum adapter current, which reduces cost. the MAX1870a provides analog outputs to monitor the cur- rent drawn from the ac adapter and charge current. a digital output indicates the presence of an ac adapter. when the adapter is removed, the MAX1870a con- sumes less than 1? from the battery. the MAX1870a is available in a 32-pin thin qfn (5mm x 5mm) package and is specified over the -40 c to +85 c extended temperature range. the MAX1870a evaluation kit (MAX1870aevkit) is available to help reduce design time. applications notebook and subnotebook computers handheld terminals features ? step-up/step-down control scheme ? 0.5% charge-voltage accuracy ? 9% charge-current accuracy ? 8% input current-limit accuracy ? programmable maximum battery charge current ? analog inputs control charge current, charge voltage, and input current limit ? analog output indicates adapter current ? input voltage from 8v to 28v ? battery voltage from 0 to 17.6v ? charges li+ or nicd/nimh batteries ? tiny 32-pin thin qfn (5mm x 5mm) package MAX1870a step-up/step-down li+ battery charger ________________________________________________________________ maxim integrated products 1 ordering information MAX1870a refin dcin cssp cssn dhi dbst csip csin batt shdn asns vctl iinp pgnd system load n p gnd ictl cls cells from wall adapter csss vhn vhp blkp ref ldo dlov typical operating circuit 19-3243; rev 1; 9/05 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available pin configuration appears at end of data sheet. part temp range pin-package MAX1870aetj -40? to +85? 32 thin qfn MAX1870aetj+ -40? to +85? 32 thin qfn + denotes lead-free package.
MAX1870a step-up/step-down li+ battery charger 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (circuit of figure 2, v dcin = v cssp = v cssn = v csss = v vhp = 18v, v batt = v csip = v csin = v blkp = 12v, v refin = 3.0v, v ictl = 0.75 x v refin , vctl = ldo, cells = float, gnd = pgnd = 0, v dlov = 5.4v, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. dcin, cssp, csss, cssn, vhp, vhn, dhi to gnd ......................................-0.3v to +30v vhp, dhi to vhn .....................................................-0.3v to +6v batt, csip, csin, blkp to gnd ..........................-0.3v to +20v csip to csin, cssp to cssn, cssp to csss, pgnd to gnd ..........................-0.3v to +0.3v cci, ccs, ccv, ref, iinp to gnd ..........-0.3v to (v ldo + 0.3v) dbst to gnd..........................................-0.3v to (v dlov + 0.3v) dlov, vctl, ictl, refin, cells, cls, ldo, asns, shdn to gnd .........................-0.3v to +6v ldo current........................................................................50ma continuous power dissipation (t a = +70?) 32-pin thin qfn 5mm x 5mm (derate 21mw/? above +70?) ......................................1.7w operating temperature range MAX1870aetj .................................................-40? to +85? storage temperature range .............................-60? to +150? lead temperature (soldering, 10s) ................................ +300? parameter conditions min typ max units charge-voltage regulation vctl range 0 3.6 v v vctl = v ldo (2 cells) -0.5 +0.5 v vctl = v ldo (3 cells) -0.5 +0.5 v vctl = v ldo (4 cells) -0.5 +0.5 v vctl = v refin (2 cells) -0.8 +0.8 v vctl = v refin (3 cells) -0.8 +0.8 v vctl = v refin (4 cells) -0.8 +0.8 v vctl = v refin / 20 (2 cells) -1.2 +1.2 v vctl = v refin / 20 (3 cells) -1.2 +1.2 battery regulation voltage accuracy v vctl = v refin / 20 (4 cells) -1.2 +1.2 % vctl default threshold vctl rising 4.0 4.1 4.2 v 0 < v vctl < v refin -1 +1 dcin = 0 , v refin = v vctl = 3.6v -1 +1 vctl input bias current vctl = dcin = 0, v refin = 3.6v -1 +1 ? charge-current regulation ictl range 0 3.6 v v ictl = v refin 67 73 79 v ictl = v refin x 0.8 54 59 64 quick-charge-current accuracy v ictl = v refin x 0.583 39 43 47 mv trickle-charge-current accuracy v ictl = v refin x 0.0625 3.0 4.5 6.0 mv batt/csip/csin input voltage range 0 19 v dcin = 0 0.1 2 ictl = 0 0.1 2 csip input current ictl = refin 350 600 ?
MAX1870a step-up/step-down li+ battery charger _______________________________________________________________________________________ 3 parameter conditions min typ max units dcin = 0 0.1 2 ictl = 0 0.1 2 csin input current ictl = refin 0.1 2 ? ictl power-down-mode threshold voltage refin / 100 refin / 55 refin / 32 v 0 < v ictl < v refin -1 +1 ictl input bias current ictl = dcin = 0, v refin = 3.6v -1 +1 ? input-current regulation cls = ref 97 105 113 charger-input current-limit accuracy (v cssp - v cssn ) csss = cssp cls = ref x 0.845 81 88 95 mv cls = ref 97 105 113 system-input current-limit accuracy (v cssp - v csss ) cssn = cssp cls = ref x 0.845 81 88 95 mv cssp/csss/cssn input voltage range 8 28 v v cssp = v cssn = v csss = v dcin = 6v -1 +1 cssp input current v cssp = v cssn = v csss = v dcin = 8v, 28v 700 1200 ? v cssp = v cssn = v csss = v dcin = 6v -1 +1 csss/cssn input current v cssp = v cssn = v csss = v dcin = 8v, 28v -1 +1 ? cls input range v ref / 2 v ref v cls input bias current cls = ref -1 +1 ? iinp transconductance v cssp - v csss = 102mv, cssn = cssp 2.5 2.8 3.1 ?/mv v cssp - v cssn = 200mv, v iinp = 0v 350 iinp output current v cssp - v csss = 200mv, v iinp = 0v 350 ? v cssp - v cssn = 200mv, iinp float 3.5 iinp output voltage v cssp - v csss = 200mv, iinp float 3.5 v supply and linear regulator dcin input voltage range 8 28 v dcin falling 4 6.2 dcin undervoltage lockout dcin rising 6.3 7.85 v dcin quiescent current 8.0v < v dcin < 28v 3.5 6 ma batt input voltage range 0 19 v dcin = 0 0.1 1 batt input bias current v batt = 2v to 19v 300 500 ? ldo output voltage no load 5.3 5.4 5.5 v ldo load regulation 0 < i ldo < 10ma 70 150 mv ldo undervoltage lockout v dcin = 8v, ldo rising 4.00 5.0 5.25 v electrical characteristics (continued) (circuit of figure 2, v dcin = v cssp = v cssn = v csss = v vhp = 18v, v batt = v csip = v csin = v blkp = 12v, v refin = 3.0v, v ictl = 0.75 x v refin , vctl = ldo, cells = float, gnd = pgnd = 0, v dlov = 5.4v, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.)
MAX1870a step-up/step-down li+ battery charger 4 _______________________________________________________________________________________ parameter conditions min typ max units reference ref output voltage i ref = 0? 4.076 4.096 4.116 v ref load regulation 0 < i ref < 500? 5 10 mv ref undervoltage-lockout trip point v ref falling 3.1 3.9 v refin input range 2.5 3.6 v refin uvlo rising 1.9 2.2 v refin uvlo hysteresis 50 mv v dcin = 18v 50 100 refin input bias current dcin = 0, v refin = 3.6v -1 +1 ? switching regulator c ycl e- b y- c ycl e s tep - u p m axi m um c ur r ent- li m i t s ense v ol tag e v dcin = 12v, v batt = 16.8v 135 150 165 mv c ycl e- b y- c ycl e s tep - d ow n m axi m um c ur r ent- li m i t s ense v ol tag e v dcin = 19v, v batt = 16.8v 135 150 165 mv step-down on-time v dcin = 18v, v batt = 16.8v 2.2 2.4 2.6 ? minimum step-down off-time v dcin = 18v, v batt = 16.8v 0.15 0.4 0.50 ? step-up off-time v dcin = 12v, v batt = 16.8v 1.6 1.8 2.0 ? minimum step-up on-time v dcin = 12v, v batt = 16.8v 0.15 0.3 0.40 ? mosfet drivers vhp - vhn output voltage 8v < v vhp < 28v, no load 4.5 5 5.5 v vhn load regulation 0 < i vhn < 10ma 70 150 mv dhi on-resistance high i source = 10ma 2 5 dhi on-resistance low i sink = 10ma 1 3 dcin = 0 0.1 1 ? vhp input bias current v dcin = 18v 1.3 2 ma ictl = 0 0.1 2 blkp input bias current v ictl = v refin = 3.3v 100 400 ? dlov supply current dbst low 5 10 ? dbst on-resistance high i source = 10ma 2 5 dbst on-resistance low i sink = 10ma 1 3 error amplifiers gmv amplifier loop transconductance v c tl = re fin , v bat t = 16.8v 0.05 0.1 0.20 ?/mv gmi amplifier loop transconductance ictl = refin, v csip - v csin = 72mv 1.8 2.4 3.0 ?/mv electrical characteristics (continued) (circuit of figure 2, v dcin = v cssp = v cssn = v csss = v vhp = 18v, v batt = v csip = v csin = v blkp = 12v, v refin = 3.0v, v ictl = 0.75 x v refin , vctl = ldo, cells = float, gnd = pgnd = 0, v dlov = 5.4v, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.)
MAX1870a step-up/step-down li+ battery charger _______________________________________________________________________________________ 5 parameter conditions min typ max units v cls = ref, v cssp - v cssn = 102mv, v cssp = v csss 1.2 1.7 2.2 gms amplifier loop transconductance v cls = ref, v cssp - v csss = 102mv, v cssp = v cssn 1.2 1.7 2.2 ?/mv vctl = refin, v batt = 15.8v 50 ccv output current vctl = refin, v batt = 17.8v -50 ? ictl = refin, v csip - v csin = 0mv 150 cci output current ictl = refin, v csip - v csin = 150mv -150 ? cls = ref, v cssp = v cssn , v cssp = v csss 100 ccs output current cls = ref, v cssp - v cssn = 200mv, v cssp - v csss = 200mv -100 ? cci/ccs/ccv clamp voltage 1.1v < v ccv < 3.5v, 1.1v < v ccs < 3.5v, 1.1v < v cci < 3.5v 100 300 500 mv logic levels asns output-voltage low v iinp = gnd, i sink = 1ma 0.4 v asns output-voltage high v iinp = 4v, i source = 1ma ldo - 0.5 v v iinp rising 1.1 1.15 1.2 v asns current detect hysteresis 50 mv v shdn = 0 to v refin -1 +1 shdn input bias current dcin = 0, v refin = 5v, v shdn = 0 to v refin -1 +1 ? shdn threshold shdn falling, v refin = 2.8v to 3.6v 22 23.5 25 % of refin shdn hysteresis 1 % of refin cells input low voltage 0.75 v cells float voltage 40 50 60 % of refin cells input high voltage re fin - 0.75v v cells input bias current cells = 0 to refin -2 +2 ? electrical characteristics (continued) (circuit of figure 2, v dcin = v cssp = v cssn = v csss = v vhp = 18v, v batt = v csip = v csin = v blkp = 12v, v refin = 3.0v, v ictl = 0.75 x v refin , vctl = ldo, cells = float, gnd = pgnd = 0, v dlov = 5.4v, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.)
MAX1870a step-up/step-down li+ battery charger 6 _______________________________________________________________________________________ parameter conditions min typ max units charge-voltage regulation vctl range 0 3.6 v v vctl = v ldo (2 cells) -0.8 +0.8 v vctl = v ldo (3 cells) -0.8 +0.8 v vctl = v ldo (4 cells) -0.8 +0.8 v vctl = v refin (2 cells) -1.2 +1.2 v vctl = v refin (3 cells) -1.2 +1.2 v vctl = v refin (4 cells) -1.2 +1.2 v vctl = v refin / 20 (2 cells) -1.4 +1.4 v vctl = v refin / 20 (3 cells) -1.4 +1.4 battery regulation voltage accuracy v vctl = v refin / 20 (4 cells) -1.4 +1.4 % vctl default threshold vctl rising 4.0 4.2 v charge-current regulation ictl range 0 3.6 v v ictl = v refin 66 80 v ictl = v refin x 0.8 53 65 quick-charge-current accuracy v ictl = v refin x 0.583 38 48 mv batt/csip/csin input voltage range 0 19 v csip input current ictl = refin 600 ? ictl power-down-mode threshold voltage refin / 100 refin / 32 v input-current regulation cls = ref 95 115 charger-input current-limit accuracy (v cssp - v cssn ) csss = cssp cls = ref x 0.845 79 97 mv cls = ref 95 115 system-input current-limit accuracy (v cssp - v csss ) cssn = cssp cls = ref x 0.845 79 97 mv cssp/csss/cssn input voltage range 8 28 v cssp input current v cssp = v cssn = v csss = v dcin = 8v, 28v 1200 ? cls input range v ref / 2 v ref v iinp transconductance v cssp - v csss = 102mv, cssn = cssp 2.5 3.1 ?/mv v cssp - v cssn = 200mv, v iinp = 0v 350 iinp output current v cssp - v csss = 200mv, v iinp = 0v 350 ? v cssp - v cssn = 200mv, iinp float 3.5 iinp output voltage v cssp - v csss = 200mv, iinp float 3.5 v electrical characteristics (circuit of figure 2, v dcin = v cssp = v cssn = v csss = v vhp = 18v, v batt = v csip = v csin = v blkp = 12v, v refin = 3.0v, v ictl = 0.75 x v refin , vctl = ldo, cells = float, gnd = pgnd = 0, v dlov = 5.4v, t a = -40? to +85? .) (note 1)
MAX1870a step-up/step-down li+ battery charger _______________________________________________________________________________________ 7 parameter conditions min typ max units supply and linear regulator dcin input voltage range 8 28 v dcin falling 4 dcin undervoltage lockout dcin rising 7.85 v dcin quiescent current 8.0v < v dcin < 28v 6 ma batt input voltage range 0 19 v batt input bias current v batt = 2v to 19v 500 ? ldo output voltage no load 5.3 5.5 v ldo undervoltage lockout v dcin = 8v, ldo rising 4.00 5.25 v reference ref output voltage i ref = 0? 4.060 4.132 v ref load regulation 0 < i ref < 500? 10 mv ref undervoltage-lockout trip point v ref falling 3.9 v refin input range 2.5 3.6 v refin uvlo rising 2.2 v refin input bias current v dcin = 18v 100 ? switching regulator c ycl e- b y- c ycl e s tep - u p m axi m um c ur r ent- li m i t s ense v ol tag e v dcin = 12v, v batt = 16.8v 130 170 mv c ycl e- b y- c ycl e s tep - d ow n m axi m um c ur r ent- li m i t s ense v ol tag e v dcin = 19v, v batt = 16.8v 130 170 mv step-down on-time v dcin = 18v, v batt = 16.8v 2.2 2.6 ? minimum step-down off-time v dcin = 18v, v batt = 16.8v 0.15 0.50 ? step-up off-time v dcin = 12v, v batt = 16.8v 1.6 2.0 ? minimum step-up on-time v dcin = 12v, v batt = 16.8v 0.15 0.40 ? mosfet drivers vhp - vhn output voltage 8v < v vhp < 28v, no load 4.5 5.5 v vhn load regulation 0 < i vhn < 10ma 150 mv dhi on-resistance high i source = 10ma 5 dhi on-resistance low i sink = 10ma 3 vhp input bias current v dcin = 18v 2 ma blkp input bias current v ictl = v refin = 3.3v 400 ? dlov supply current dbst low 10 ? dbst on-resistance high i source = 10ma 5 dbst on-resistance low i sink = 10ma 3 electrical characteristics (continued) (circuit of figure 2, v dcin = v cssp = v cssn = v csss = v vhp = 18v, v batt = v csip = v csin = v blkp = 12v, v refin = 3.0v, v ictl = 0.75 x v refin , vctl = ldo, cells = float, gnd = pgnd = 0, v dlov = 5.4v, t a = -40? to +85? .) (note 1)
MAX1870a step-up/step-down li+ battery charger 8 _______________________________________________________________________________________ parameter conditions min typ max units error amplifiers gmv amplifier loop transconductance v c tl = re fin , v bat t = 16.8v 0.05 0.20 ?/mv gmi amplifier loop transconductance ictl = refin, v csip - v csin = 72mv 1.8 3.0 ?/mv v cls = ref, v cssp - v cssn = 102mv, v cssp = v csss 1.2 2.2 gms amplifier loop transconductance v cls = ref, v cssp - v csss = 102mv, v cssp = v cssn 1.2 2.2 ?/mv vctl = refin, v batt = 15.8v 50 ccv output current vctl = refin, v batt = 17.8v -50 ? ictl = refin, v csip - v csin = 0mv 150 cci output current ictl = refin, v csip - v csin = 150mv -150 ? cls = ref, v cssp = v cssn , v cssp = v csss 100 ccs output current cls = ref, v cssp - v cssn = 200mv, v cssp - v csss = 200mv -100 ? cci/ccs/ccv clamp voltage 1.1v < v ccv < 3.5v, 1.1v < v ccs < 3.5v, 1.1v < v cci < 3.5v 100 500 mv logic levels asns output-voltage low v iinp = gnd, i sink = 1ma 0.4 v asns output-voltage high v iinp = 4v, i source = 1ma ldo - 0.5 v asns current detect v iinp rising 1.1 1.15 1.2 v shdn threshold shdn falling, v refin = 2.8v to 3.6v 22 25 % of refin cells input low voltage 0.75 v cells float voltage 40 60 % of refin cells input high voltage re fin - 0.75v v electrical characteristics (continued) (circuit of figure 2, v dcin = v cssp = v cssn = v csss = v vhp = 18v, v batt = v csip = v csin = v blkp = 12v, v refin = 3.0v, v ictl = 0.75 x v refin , vctl = ldo, cells = float, gnd = pgnd = 0, v dlov = 5.4v, t a = -40? to +85? .) (note 1) note 1: specifications to -40? are guaranteed by design, not production tested.
MAX1870a step-up/step-down li+ battery charger _______________________________________________________________________________________ 9 battery insertion and removal MAX1870atoc01 v batt 18v 16v i charge 5a/div 0 cci and ccv cci ccv 0 2v 4v 20v 2.00ms/div battery removal battery insertion ccv cci battery-removal response MAX1870atoc02 v batt 21v 18v 20v 19v 16v 17v 10.0 s/div r cv = 10k , c out = 22 f r cv = 10k , c out = 44 f r cv = 20k , c out = 44 f system load-transient response MAX1870atoc03 4a 2a 0a inductor current system load input current battery current 5a 0a 2a 0a 0a 5a 200 s step-down mode system load-transient response MAX1870atoc04 4a 2a 0a inductor current system load input current battery current 5a 0a 2a 0a 0a 5a 100 s hybrid mode charge-current step response MAX1870atoc05 2a 0a 1v inductor current battery current 0v cci 0a 2a 0v 5v v ictl 400 s step-down mode charge-current step response MAX1870atoc06 2a 0a 1v inductor current battery current 0v cci 0a 2a 0v 5v v ictl 400 s hybrid mode typical operating characteristics (circuit of figure 1, v dcin = 16v, cells = refin, v cls = v ref , v ictl = v refin = 3.3v, t a = +25 c, unless otherwise noted.)
MAX1870a step-up/step-down li+ battery charger 10 ______________________________________________________________________________________ typical operating characteristics (continued) (circuit of figure 1, v dcin = 16v, cells = refin, v cls = v ref , v ictl = v refin = 3.3v, t a = +25 c, unless otherwise noted.) efficiency vs. battery voltage MAX1870a toc07 battery voltage (v) efficiency (%) 12 4 816 14 610 65 70 75 80 90 85 95 60 218 v in = 12v v in = 16v efficiency vs. charge current MAX1870a toc08 charge current (a) efficiency (%) 2.0 1.5 0.5 1.0 65 70 75 80 90 85 95 100 60 02.5 v batt = 16.8v v batt = 8.4v v batt = 12.6v battery voltage error in cv mode MAX1870a toc09 charge current (a) battery voltage error (%) 2.0 1.5 0.5 1.0 -0.4 -0.3 -0.2 -0.1 0.2 0 0.4 0.1 0.3 0.5 -0.5 02.5 v batt = 16.8v v batt = 12.6v v batt = 8.4v battery voltage error vs. vctl MAX1870atoc10 vctl (v) battery voltage error (%) 3.00 2.00 1.00 0.05 0.10 0.15 0.20 0.25 0 0 4.00 charge-current error vs. ictl MAX1870atoc11 v ictl (v) charge-current error (ma) 2.50 2.00 1.50 1.00 0.50 -70 -60 -50 -40 -30 -20 -10 0 10 20 -80 0 3.00 charge-current error vs. battery voltage MAX1870atoc12 v batt (v) charge-current error (%) 15 10 5 -10 -5 0 5 10 15 -15 020 i chg = 0.15a i chg = 2.4a i chg = 1.9a i chg = 1.4a iinp error vs. system load MAX1870atoc13 system load (a) iinp error (mv) 3.0 2.0 0.5 1.5 3.5 2.5 1.0 -4 -2 0 2 4 -3 -1 1 3 5 -5 0 4.0 input current-limit error vs. system current MAX1870a toc14 system current (a) input current-limit error (%) 3.0 2.5 0.5 1.5 1.0 2.0 -8 -6 -4 -2 4 0 8 2 6 10 -10 0 3.5 v batt = 16v v batt = 14v v batt = 10v v batt = 8v v batt = 6v v batt = 12v input current-limit error vs. cls MAX1870a toc15 v cls (v) input current-limit error (ma) 4.00 2.00 1.00 3.00 -250 -200 -150 -100 50 -50 150 0 100 200 -300 0 5.00
MAX1870a step-up/step-down li+ battery charger ______________________________________________________________________________________ 11 typical operating characteristics (continued) (circuit of figure 1, v dcin = 16v, cells = refin, v cls = v ref , v ictl = v refin = 3.3v, t a = +25 c, unless otherwise noted.) ref load regulation MAX1870a toc16 load current ( a) v ref (v) 2000 1000 500 1500 4.04 4.05 4.06 4.08 4.07 4.10 4.09 4.11 4.03 02500 reference error vs. temperature MAX1870atoc17 temperature ( c) reference error (%) 80 60 20 40 0 -20 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0 -40 100 ldo load regulation MAX1870a toc18 load (ma) v ldo (v) 40 30 10 20 5.26 5.32 5.28 5.36 5.30 5.34 5.38 5.24 050 v in = 28v v in = 16v v in = 9v ldo vs. temperature MAX1870a toc19 temperature ( c) ldo voltage error (%) 80 40 -20 060 20 -0.2 0.2 0.6 0 0.4 0.8 -0.4 -40 100 output voltage ripple vs. battery voltage MAX1870atoc20 v batt (v) rms output ripple (mv) 15 10 5 20 40 60 80 100 120 140 160 180 0 020 step-up/step-down switching waveform MAX1870atoc21 0v d4 10v 0v cathode d3 anode inductor current 4a v batt (ac-coupled) 200mv/div 2a 10v 20v 2.00 s v in = 16v v batt = 16v step-down switching waveform MAX1870atoc22 0v d4 10v 0v cathode d3 anode inductor current 4a v batt (ac-coupled) 10mv/div 2a 10v 20v 2.00 s v in = 16v v batt = 12v
MAX1870a step-up/step-down li+ battery charger 12 ______________________________________________________________________________________ typical operating characteristics (continued) (circuit of figure 1, v dcin = 16v, cells = refin, v cls = v ref , v ictl = v refin = 3.3v, t a = +25 c, unless otherwise noted.) pin description pin name function 1ldo device power supply. output of the 5.4v linear regulator supplied from dcin. bypass ldo to gnd with a 1? or greater ceramic capacitor. 2 ref 4.096v voltage reference. bypass ref to gnd with a 1? or greater ceramic capacitor. 3 cls source current-limit input. voltage input for setting the current limit of the input source. see the setting the input current limit section. 4, 8 gnd analog ground 5 ccv voltage regulation loop compensation point. connect a 10k resistor in series with a 0.01? capacitor to gnd. 6 cci charge-current regulation loop compensation point. connect a 0.01? capacitor to gnd. 7 ccs input-current regulation loop compensation point. connect a 0.01? capacitor to gnd. 9 refin reference input. ictl and vctl are ratiometric with respect to refin for increased accuracy. 10 asns adapter sense output. logic output is high when input current is greater than 1.5a (using 30m sense resistors and a 10k resistor from iinp to gnd). 11 vctl charge-voltage control input. drive vctl from 0 to v refin to adjust the charge voltage from 4v to 4.4v per cell. see the setting the charge voltage section. step-up switching waveform MAX1870atoc23 0v d4 10v 0v cathode d3 anode inductor current 4a v batt (ac-coupled) 50mv/div 2a 10v 20v 2.00 s v in = 12v v batt = 16v step-up/step-down light load MAX1870atoc24 0v d4 10v 0v cathode d3 anode inductor current 4a v batt (ac-coupled) 50mv/div 2a 10v 20v 2.00 s v in = 16v v batt = 16v charge current = 300ma
MAX1870a step-up/step-down li+ battery charger ______________________________________________________________________________________ 13 pin description (continued) pin name function 12 ictl charge-current control input. drive ictl from v refin / 32 to v refin to adjust the charge current. see the setting the charge current section. drive ictl to gnd to disable charging. 13 cells cell-count selection input. connect cells to gnd for two li+ cells. float cells for three li+ cells, or connect cells to refin for four li+ cells. 14 iinp input-current monitor output. iinp is a replica of the input current sensed by the MAX1870. it represents the sum of the current consumed by the charger and the current consumed by the system. iinp has a transconductance of 2.8?/mv. 15 shdn shutdown comparator input. pull shdn low to stop charging. optionally connect a thermistor to stop charging when the battery temperature is too hot. 16 batt battery-voltage feedback input 17 csin charge current-sense negative input 18 csip charge current-sense positive input. connect a current-sense resistor from csip to csin. connect a 2.2? capacitor from csip to gnd. 19 blkp power connection for current-sense amplifier. connect blkp to batt. 20, 21 i.c. internally connected. do not connect this pin. 22 dbst step-up power mosfet (nmos) gate-driver output 23 pgnd power ground 24 i.c. internally connected. do not connect this pin. 25 dlov low-side driver supply. bypass dlov with a 1? capacitor to gnd. 26 vhn power connection for the high-side mosfet driver. bypass vhp to vhn with a 1? or greater ceramic capacitor. 27 dhi high-side power mosfet (pmos) driver output. connect to the gate of the high-side step-down mosfet. 28 vhp power connection for the high-side mosfet driver. bypass vhp to vhn with a 1? or greater ceramic capacitor. 29 cssn negative terminal for current-sense resistor for charger current. connect a 2.2? capacitor from cssn to gnd. 30 csss negative terminal for current-sense resistor for system load current 31 cssp positive terminal for input current-sense resistors. connect a current-sense resistor from cssp to cssn. connect an equivalent sense resistor from cssp to csss. 32 dcin dc supply voltage input. bypass dcin with a 1? or greater ceramic capacitor to power ground. paddle paddle. connect to gnd.
MAX1870a step-up/step-down li+ battery charger 14 ______________________________________________________________________________________ MAX1870a 23 4 vhp vhn cssp cssn dhi dbst csip csin batt dlov ldo blkp csss 16 12 13 28 26 31 29 27 22 14 9 10 11 dcin ref cls ccv cci ccs refin asns vctl ictl cells iinp pgnd 32 18 17 25 1 15 7 6 5 3 2 ac adapter vdd host digital input d/a output d/a output hi-impedance output logic output a/d input gnd system load + - r3 r4 r7 10k c6 0.01 f c8 22 f c9 44 f c7 1 f rs2 30m l1 10 h c11 1 f c12 1 f m2 m1 19 n p rs1b 30m gnd 30 rs1a 30m r6 33 c5 1 f c1 1 f d1 d2 optional reverse- adapter protection 2.2 f 2.2 f d3 d4 r5 10k c2 0.01 f c3 0.01 f c4 0.01 f shdn figure 1. ?-controlled typical application circuit
MAX1870a step-up/step-down li+ battery charger ______________________________________________________________________________________ 15 23 4 7 6 vhp vhn cssp cssn dhi dbst csip csin batt dlov ldo blkp csss 16 28 26 31 29 27 22 dcin ref cells cls pgnd 32 18 17 25 1 3 refin 9 vctl 11 ictl 12 asns 10 iinp 14 ccv 5 15 2 13 system load c8 22 f c9 44 f c7 1 f rs2 30m l1 10 h c11 1 f c12 1 f m2 m1 19 n p rs1b 30m gnd ccs cci 30 rs1a 30m r6 33 c5 1 f c1 1 f 2.2 f 2.2 f d3 d4 r4 open r3 short r9 open r10 open r1 short r12 open ldo r7 10k r5 10k c6 0.01 f c3 0.01 f c4 0.01 f c2 0.01 f shdn ac adapter + - d1 d2 optional MAX1870a optional reverse- adapter protection figure 2. stand-alone typical application circuit
MAX1870a step-up/step-down li+ battery charger 16 ______________________________________________________________________________________ detailed description the MAX1870a includes all of the functions necessary to charge li+, nimh, and nicd batteries. a high-effi- ciency h-bridge topology dc-dc converter controls charge voltage and current. a proprietary control scheme offers improved efficiency and smaller inductor size compared to conventional h-bridge controllers and operates from input voltages above and below the bat- tery voltage. the MAX1870a includes analog control inputs to limit the ac adapter current, charge current, and battery voltage. an analog output (iinp) delivers a current proportional to the source current. the typical application circuit shown in figure 1 uses a microcon- troller (c) to control the charge current or voltage, while figure 2 shows a typical application with the charge voltage and current fixed to specific values for the application. the voltage at ictl and the value of rs2 set the charge current. the voltage at vctl and the cells inputs set the battery regulation voltage for the charger. the voltage at cls and the value of r3 and r4 set the source current limit. the MAX1870a features a voltage-regulation loop (ccv) and two current-regulation loops (cci and ccs). ccv is the compensation point for the battery voltage regulation loop. cci and ccs are the compensation points for the battery charge current and supply current loops, respectively. the MAX1870a regulates the adapter current by reducing battery charge current according to system load demands. setting the charge voltage the MAX1870a provides high-accuracy regulation of the charge voltage. apply a voltage to vctl to adjust the battery-cell voltage limit. set vctl to a voltage between 0 and v refin for a 10% adjustment of the bat- tery cell voltage, or connect vctl to ldo for a default setting of 4.2v per cell. the limited adjustment range reduces the sensitivity of the charge voltage to external resistor tolerances. the overall accuracy of the charge voltage is better than ?% when using ?% resistors to divide down the reference to establish vctl. the per- cell battery-termination voltage is a function of the bat- tery chemistry and construction. consult the battery manufacturer to determine this voltage. calculate bat- tery voltage using the following equation: where n cells is the cell count selected by cells. vctl is ratiometric with respect to refin to improve accuracy when using resistive voltage-dividers. connect cells as shown in table 1 to charge two, three, or four cells. the cell count can either be hard- wired or software controlled. the internal error amplifier (gmv) maintains voltage regulation (see figure 3 for the functional diagram ). connect a 10k resistor in series with a 0.01? capacitor from ccv to gnd to compensate the battery voltage loop. see the voltage loop compensation section for more information. setting the charge current set the maximum charge current using ictl and the current-sense resistor rs2 connected between csip and csin. the current threshold is set by the ratio of v ictl / v refin . use the following equation to program the battery charge current: where v csit is the full-scale charge current-sense threshold, 73mv (typ). the input range for ictl is v refin / 32 to v refin . to shut down the MAX1870a, force ictl below v refin / 100. the internal error amplifier (gmi) maintains charge- current regulation (see figure 3 for the functional diagram ). connect a 0.01? capacitor from cci to gnd to compensate the charge-current loop. see the charge- current loop compensation section for more information. setting the input current limit the total input current, from a wall adapter or other dc source, is a function of the system supply current and the battery charge current. the MAX1870a limits the wall adapter current by reducing the charge current when the input current exceeds the input current-limit set point. as the system supply current rises, the available charge current decreases linearly to zero in proportion to the system current. after the charge current has fallen to zero, the MAX1870a cannot further limit the wall adapter current if the system current continues to increase. i v r x v v chg csit s ictl refin = 2 vnxvvx v v batt cells vctl refin =+ ? ? ? ? ? ? 404 . table 1. cell-count programming table cells cell count gnd 2 float 3 refin 4
MAX1870a step-up/step-down li+ battery charger ______________________________________________________________________________________ 17 MAX1870a cssn cssp csss cls ccs ictl cci csip csin ccv batt cells vctl a = 18v/v a = 18v/v css current- sense amplifiers 3.6v (6.7a for 30m ) imax1 input-current block gms iinp asns gm 0.81mv (1.5a for 30m ) 50mv refin x 400mv refin x gmi a = 18v/v csi 22.5mv (42ma on 30m ) (6.7a for 30m ) 3.6v izx imax2 charge-current block + 4.0v 4.2v gmv ref cell- select logic battery-voltage block shutdown logic 5.4v linear regulator 4.096v reference dcin ldo ref refin 1/55 chg rdy ictl 23% of refin gnd pgnd dlov vhn dhi vhp dbst shdn level shift step-up/down current-mode state machine imax1 lvc imin 0.15v lvc low- side driver high- side driver figure 3. functional diagram
MAX1870a step-up/step-down li+ battery charger 18 ______________________________________________________________________________________ the input source current is the sum of the MAX1870a quiescent current, the charger input current, and the system load current. the MAX1870a? 6ma maximum quiescent current is minimal compared to the charge and load currents. the actual wall adapter current is determined as follows: where is the efficiency of the dc-dc converter (85% to 95% typ), i sys_load is the system load current, i adapter is the adapter current, and i charge is the charge current. by controlling the input current, the current require- ments of the ac wall adapter are reduced, minimizing system size and cost. since charge current is reduced to control input current, priority is given to system loads. an internal amplifier compares the sum of (v cssp - v cssn ) and (v cssp - v csss ) to a scaled voltage set by the cls input. drive v cls directly or set with a resistive voltage-divider between ref and gnd. connect cls to ref for the maximum input current limit of 105mv. sense resistors rs1a and rs1b set the maximum- allowable wall adapter current. use the same values for rs1a, rs1b, and rs2. calculate the maximum wall adapter current as follows: where v csst is the full-scale source current-sense volt- age threshold, and is 105mv (typ). the internal error amplifier (gms) maintains input-current regulation (see figure 3 for the functional diagram). typically, connect a 0.01? capacitor from ccs to gnd to compensate the source current loop (gms). see the charge-current and wall-adapter-current loop compensation for more information. input current measurement the MAX1870a includes an input-current monitor out- put, iinp. iinp is a scaled-down replica of the system load current plus the input-referred charge current. the output voltage range for iinp is 0 to 3.5v. the voltage of iinp is proportional to the output current by the fol- lowing equation: v iinp = i adapter x rs1_ x g iinp x r7 where i adapter is the dc current supplied by the ac adapter, g iinp is the transconductance of iinp (2.8?/mv typ), and r7 is the resistor connected between iinp and ground. in the typical application circuit , the duty cycle and ac load current affect the accuracy of v iinp (see the typical operating characteristics). ldo regulator ldo provides a 5.4v supply derived from dcin. the low-side mosfet driver is powered by dlov, which must be connected to ldo as shown in figure 1. ldo also supplies the 4.096v reference (ref) and most of the internal control circuitry. bypass ldo to gnd with a 1? or greater ceramic capacitor. bypass dlov to pgnd with a 1? or greater ceramic capacitor. ac adapter detection the MAX1870a includes a logic output, asns, which indicates ac adapter presence. when the system load draws more than 1.5a (for 30m sense resistors and r7 is 10k), the asns logic output pulls high. shutdown when the ac adapter is removed, the MAX1870a shuts down to a low-power state, and typically consumes less than 1? from the battery through the combined load of the csip, csin, blkp, and batt inputs. the charger enters this low-power state when dcin falls below the undervoltage-lockout (uvlo) threshold of 7.5v. alternatively, drive shdn below 23.5% of v refin or drive ictl below v refin / 100 to inhibit charge. this suspends switching and pulls cci, ccs, and ccv to ground. the ldo, input current monitor, and control logic all remain active in this state. step-up/step-down dc-dc controller the MAX1870a is a step-up/step-down dc-dc con- troller. the MAX1870a controls a low-side n-channel mosfet and a high-side p-channel mosfet to a con- stant output voltage with input voltage variation above, near, and below the output. the MAX1870a implements a control scheme that delivers higher efficiency with smaller components and less output ripple when com- pared with other step-up/step-down control algorithms. this occurs because the MAX1870a operates with lower inductor currents, as shown in figure 4. the MAX1870a proprietary algorithm offers the follow- ing benefits: ? inductor current requirements are minimized. ? low inductor-saturation current requirements allow the use of physically smaller inductors. ? low inductor current improves efficiency by reducing i 2 r losses in the mosfets, inductor, and sense resistors. i v v x v rs adapter max cls ref csst _ _ = 1 ii ixv vx adapter sys load charge batt in =+ _
MAX1870a step-up/step-down li+ battery charger ______________________________________________________________________________________ 19 ? continuous output current for v in > 1.4 x v out reduces output ripple. the MAX1870a uses the state machine shown in figure 5. the controller switches between the states a, b, and c, depending on v in and v batt . state d provides pfm operation during light loads. under moderate and heavy loads the MAX1870a operates in pwm. step-down operation (v in > 1.4 x v batt ) during medium and heavy loads when v in > 1.4 x v batt , the MAX1870a alternates between state a and state b, keeping mosfet m2 off (figure 5). figure 6 shows the inductor current in step-down operation. during this mode, the MAX1870a regulates the step- down off-time. initially, dhi switches m1 off (state a) and the inductor current ramps down with a di/dt of v batt / l until a target current is reached (determined by the error integrator). after the target current is reached, dhi switches m1 on (state b), and the inductor current ramps up with a di/dt of (v in - v batt ) / l. m1 remains on until a step-down on-time timer expires. this on-time is calculat- ed based on the input and output voltage to maintain pseudo-fixed-frequency 400khz operation. at the end of state b, another step-down off-time (state a) is initiated and the cycle repeats. the off-time is valley regulated according to the error signal. the error signal is set by the charge current or source current if either is at its limit, or the battery voltage if both charge current and source current are below their respective current limits. during light loads, when the inductor current falls to zero during state a, the controller switches to state d to reduce power consumption and avoid shuttling current in and out of the output. step-up operation (v in < 0.9 x v batt ) when v in < 0.9 x v batt , the MAX1870a alternates between state b and state c, keeping mosfet m1 on. in this mode, the controller looks like a simple step-up controller. figure 7 shows the inductor current in step- a) conventional algorithm b) MAX1870a algorithm 2 x i charge shaded regions represent charge delivered time figure 4. inductor current for v in = v batt table 2. MAX1870a h-bridge controller advantages MAX1870a h-bridge controller traditional h-bridge controller only 1 mosfet switched per cycle continuous output current in step-down mode 2 mosfets switched per cycle always discontinuous output current (requires higher inductor currents)
MAX1870a step-up/step-down li+ battery charger 20 ______________________________________________________________________________________ up operation. during this mode, the MAX1870a regu- lates the step-up on-time. initially dbst switches m2 on (state c) and the inductor current ramps up with a di/dt of v in / l. after the inductor current crosses the target current (set by the error integrators), dbst switches m2 off (state b) and the inductor current ramps down with a di/dt of (v batt - v in ) / l. m2 remains off until a step- up off-time timer expires. this off-time is calculated based on the input and output voltage to maintain 400khz pseudo-fixed-frequency operation. the step-up on-time is regulated by the error signal, set according to the charge current or source current if either is at its limit, or the battery voltage if both charge current and source current are below their respective current limits. step-up/step-down operation (0.9 x v batt < v in < 1.4 x v batt ) the MAX1870a features a step-up/step-down mode that eliminates dropout. figure 8 shows the inductor current in step-up/step-down operation. when v in is within 10% of v batt , the MAX1870a alternates through states a, b, and c, following the order a, b, c, b, a, b, c, etc., with the majority of the time spent in state b. since more time is spent in state b, the inductor ripple current is reduced, improving efficiency. the time in state c is peak-current regulated, and the remaining time is spent in state b (figure 8a). during this operating mode, the average inductor current is approximately 20% higher than the load current. the time in state a is valley current and the remaining time is spent in state b (figure 8b). during this mode, the average inductor current is approximately 10% higher than the load current. alternative algorithms require inductor currents twice as high, resulting in four times larger i 2 r losses and inductors typically four times larger in volume. imin, imax, ccmp, and zcmp the MAX1870a state machine utilizes five comparators to decide which state to be in and when to switch states (figure 3). the MAX1870a generates an error v in v out m1 d3 d4 m2 step-down off v in v out m1 m2 step-down on state b state a state c v in v out m1 m2 step-down pfm idle state d v in v out m1 m2 +- step-down pwm step-up pwm step-up off step-up on d4 d2 d4 d3 d3 d3 figure 5. MAX1870a state machine
MAX1870a step-up/step-down li+ battery charger ______________________________________________________________________________________ 21 state b state a precalculated step-down on-time valley regulated off-time dl dt v in - v out l = dl dt v out l = v in > 1.4 x v batt duty = v in / v out figure 6. MAX1870a step-down inductor current waveform signal based on the integrated error of the input cur- rent, charge current, and battery voltage. the error sig- nal, determined by the lowest voltage clamp (lvc), sets the threshold for current-mode regulation. the fol- lowing comparators are used for regulation: imin: the MAX1870a operates in discontinuous conduction if lvc is below 0.15v, and does not ini- tiate another step-down on-time. in discontinuous step-up conduction, the peak current is set by imin. the peak inductor current in discontinuous step-up mode is: where vimin is the imin comparator threshold, 0.15v, and acsi is the charge current-sense ampli- fier gain, 18v/v. i v axrs pk imin csi > 2 state b state c precalculated off-time peak regulated on-time dl dt v in - v out l = dl dt v out l = v in > 0.9 x v batt duty = 1 - v in / v out figure 7. step-up inductor-current waveform
MAX1870a step-up/step-down li+ battery charger 22 ______________________________________________________________________________________ ccmp: ccmp compares the current-mode control point, lvc, to the inductor current. in step-down mode, the off-time (state a) is terminated when the inductor current falls below the current threshold set by lvc. in step-up mode, the on-time (state c) is terminated when the inductor current rises above the current threshold set by lvc. imax: the imax comparators provide a cycle-by- cycle inductor current limit. this circuit compares the inductor current (csi in step-down mode or css in step-up mode) to the internally fixed cycle- by-cycle current limit. the current-sense voltage limit is 200mv. with rs1_ = rs2 = 30m , which corresponds to 6.7a. if the inductor current-sense voltage is greater than v imax (200mv), a step-up on-time is terminated or a step-down on-time is not permitted. zcmp: the zcmp comparator detects when the inductor current crosses zero. if the zcmp output goes high during a step-down off-time, the MAX1870a switches to the idle state (state d) to conserve power. state c state b state a state b state a state b state c state b a) b) minimum step-down off-time precalculated step-up off-time precalculated step-down on-time precalculated step-down on-time minimum step-up on-time peak regulated step-up on-time valley regulated step-down off-time dl dt v batt - v in l = dl dt v in l = dl dt v batt l = figure 8. MAX1870a step-up/step-down inductor-current waveform
MAX1870a step-up/step-down li+ battery charger ______________________________________________________________________________________ 23 switching frequency the MAX1870a includes input and output-voltage feed- forward to maintain pseudo-fixed-frequency (400khz) operation. the time in state b is set according to the input voltage, output voltage, and a time constant. in step-up/step-down mode the switching frequency is effectively cut in half to allow for both the step-up cycle and the step-down cycle. the switching frequency is typically between 350khz and 405khz for v in between 8v and 28v. see the typical operating characteristics . compensation each of the three regulation loops (the battery voltage, the charge current, and the input current limit) are com- pensated separately using the ccv, cci, and ccs pins, respectively. compensate the voltage regulation loop with a 10k resistor in series with a 0.01? capaci- tor from ccv to gnd. compensate the charge current loop and source current loop with 0.01? capacitors from cci to gnd and from ccs to gnd, respectively. voltage loop compensation when regulating the charge voltage, the MAX1870a behaves as a current-mode step-down or step-up power supply. since a current-mode controller regulates its output current as a function of the error signal, the duty-cycle modulator can be modeled as a gm stage (figure 9). results are similar in step-down, step-up, or step-up/down, with the exception of a load-dependent right-half-plane zero that occurs in step-up mode. the required compensation network is a pole-zero pair formed with c cv and r cv . c cv is chosen to be large enough that its impedance is relatively small compared to r cv at frequencies near crossover. r cv sets the gain of the error amplifier near crossover. r cv and c out determine the crossover frequency and, there- fore, the closed-loop response of the system and the response time upon battery removal. r esr is the equivalent series resistance (esr) of the charger? output capacitor (c out ). r l is the equivalent charger output load, r l = v batt / i chg = r batt . the equivalent output impedance of the gmv amplifier, r ogmv , is greater than 10m . the voltage loop transconductance (gmv = i ccv / v batt ) scales inversely with the number of cells. gmv = 0.1?/mv for four cells, 0.133?/mv for three cells, and 0.2?/mv for two cells. the dc-dc converter? transconductance depends upon the charge current-sense resistor rs2: where a csi = 18, and rs2 = 30m in the typical application circuits , so gm pwm = 1.85a/v. use the following equation to calculate the loop transfer function (ltf): the poles and zeros of the voltage-loop transfer func- tion are listed from lowest frequency to highest frequen- cy in table 3. near crossover, c cv has much lower impedance than r ogmv . since c cv is in parallel with r ogmv, c cv dom- inates the parallel impedance near crossover. additionally, r cv has a much higher impedance than c cv and dominates the series combination of r cv and c cv , so: c out also has a much lower impedance than r l near crossover, so the parallel impedance is mostly capaci- tive and: if r esr is small enough, its associated output zero has a negligible effect near crossover and the loop transfer function can be simplified as follows: r sc x r sc l out l out () 1 1 + ? rxscxr sc x r r near crossover ogmv cv cv cv ogmv cv () () , 1 1 + + ? ltf gm x r x sc r sc x r x r sc x r xg x sc xr pwm ogmv cv cv cv ogmv l out l mv out esr = + + + + () () () () 1 1 1 1 gm axrs pwm csi = 1 2 gm out ref gmv r l r esr c out r o r cv c cv batt ccv figure 9. ccv simplified loop diagram
MAX1870a step-up/step-down li+ battery charger 24 ______________________________________________________________________________________ setting the ltf = 1 to solve for the unity-gain frequency yields: for stability, choose a crossover frequency lower than 1/10th of the switching frequency. the crossover fre- quency must also be below the rhp zero, calculated at maximum charge current, minimum input voltage, and maximum battery voltage. choosing a crossover frequency of 13khz and solving for r cv using the component values listed in figure 1 yields: mode = v cc (4 cells) gmv = 0.1?/mv c out = 22? gm pwm = 1.85a/v v batt = 16.8v f co_cv = 13khz r l = 0.2 f osc = 400khz to ensure that the compensation zero adequately can- cels the output pole, select f z_cv f p_out . c cv (r l / r cv ) x c out c cv 440pf figure 10 shows the bode plot of the voltage-loop fre- quency response using the values calculated above. charge-current and wall-adapter-current loop compensation when the MAX1870a regulates the charge current or the wall adapter current, the system stability does not depend on the output capacitance. the simplified schematic in figure 11 describes the operation of the MAX1870a when the charge-current loop (cci) is in con- trol. the simplified schematic in figure 12 describes the operation of the MAX1870a when the source-current r xc xf gmv x gm k cv out co cv pwm == 2 10 _ fgmxg r xc co cv pwm mv cv out _ = ? ? ? ? ? ? 2 ltf gm x r sc g pwm cv out mv = table 3. constant voltage loop poles and zeros no. name calculation description 1 ccv pole lowest frequency pole created by c cv and gmv? finite output resistance. since r ogmv is very large (r ogmv > 10m ), this is a low-frequency pole. 2 ccv zero voltage-loop compensation zero. if this zero is lower than the output pole, f p_out , then the loop transfer function approximates a single-pole response near the crossover frequency. choose c cv to place this zero at least 1 decade below crossover to ensure adequate phase margin. 3 output pole outp ut p ol e for m ed w i th the e ffecti ve load resi stance r l and the outp ut c ap aci tance c ou t . r l i nfl uences the d c g ai n b ut d oes not affect the stab i l i ty of the system or the cr ossover fr eq uency. 4 output zero output esr zero. this zero can keep the loop from crossing unity gain if f z_out is less than the desired crossover frequency. therefore, choose a capacitor with an esr zero greater than the crossover frequency. 5 rhp zero s tep - u p m od e rh p z er o. thi s zer o occur s b ecause of the i ni ti al op p osi ng r esp onse of a step - up conver ter . e ffor ts to i ncr ease the i nd uctor cur r ent r esul t i n an i m m ed i ate d ecr ease i n cur r ent d el i ver ed , al thoug h eventual l y r esul t i n an i ncr ease i n cur r ent d el i ver ed . thi s zer o i s d ep end ent on char g e cur r ent and m ay cause the system to g o unstab l e at hi g h cur r ents w hen i n step - up m od e. a r i g ht- hal f- p l ane zer o i s d etr i m ental to b oth p hase and g ai n. to ensur e stab i l i ty und er m axi m um l oad i n step - up m od e, the cr ossover fr eq uency m ust b e l ow er than hal f of f r h p z . f xr c pcv ogmv cv _ = 1 2 f xr c zcv cv cv _ = 1 2 f xr c p out l out _ = 1 2 f xr c z out esr out _ = 1 2 f v xli v xli v rhpz in l in out out = = 2 2 2
MAX1870a step-up/step-down li+ battery charger ______________________________________________________________________________________ 25 loop (ccs) is in control. since the output capacitor? impedance has little effect on the response of the current loop, only a single pole is required to compensate this loop. a csi and a css are the internal gains of the current- sense amplifiers. rs2 is the charge current-sense resis- tor. rs1a and rs1b are the adapter current-sense resistors. r ogmi and r ogms are the equivalent output impedance of the gmi and gms amplifiers, which are greater than 10m . gmi is the charge-current amplifier transconductance (2.4?/mv). gms is the adapter-cur- rent amplifier transconductance (1.7?/mv.) gm pwm is the dc-dc converter transconductance (1.85a/v). use the following equation to calculate the loop transfer function: which describes a single-pole system. since gm pwm = the loop-transfer function simplifies to: use the following equations to calculate the crossover frequency: for stability, choose a crossover frequency lower than 1/10th of the switching frequency and lower than half of the rhp zero. c ci = 10 gmi / (2 x f osc ), c cs = 10 gms / (2 x f osc ) this zero is inversely proportional to charge current and may cause the system to go unstable at high cur- rents when in step-up mode. a right-half-plane zero is detrimental to both phase and gain. to also ensure sta- bility under maximum load in step-up mode, the cci crossover frequency must also be lower than f rhpz . the right-half-plane zero does not affect ccs. choosing a crossover frequency of 30khz and using the component values listed in figure 1 yields c ci and c cs_ > 10nf. values for c ci / c cs greater than ten times the minimum value may slow down the current loop response excessively. figure 13 shows the bode plot of the input-current frequency response using the values calculated above. mosfet drivers dhi and dbst are optimized for driving moderately- sized power mosfets. use low-inductance and low- resistance traces from driver outputs to mosfet gates. dhi typically sources 1.6a and sinks 0.8a to or from the gate of the p-channel mosfet. dhi swings from vhp to vhn. vhn is a negative ldo that regulates with respect to vhp to provide high-side gate drive. connect vhp to dcin. bypass vhn with a 1? capaci- tor to vhp. f v xli v li v rhpz worstcase in min l in min outmax outmax _ __ == 22 2 f gmi c f gms c co ci ci co cs cs __ , == 22 ltf gm r sr x c ogm ogm c = + _ _ __ 1 1 axrs cs _ _ ltf gm x a x rs x gm r sr x c pwm cs ogm ogm c = + __ _ _ __ 1 ccv loop response magnitude (db) -135 -90 -45 0 80 60 40 20 -40 -20 0 1.e+00 1.e+01 1.e+02 1.e+03 1.e+04 1.e+05 1.e+06 1.e-01 frequency (hz) mag phase figure 10. ccv loop response gm pwm ref gmi r ogmi c ci cci rs2 a csi csi figure 11. cci simplified loop diagram
MAX1870a step-up/step-down li+ battery charger 26 ______________________________________________________________________________________ ldo provides a 5.4v supply derived from dcin and delivers over 10ma. the n-channel mosfet driver dbst is powered by dlov and can source 2.5a and sink 5a. since ldo provides power to the internal ana- log circuitry, use an rc filter from ldo to dlov as shown in figure 1 to minimize noise at ldo. ldo also supplies the 4.096v reference (ref) and most of the internal control circuitry. bypass ldo with a 1f or greater capacitor to gnd. applications information component selection table 4 lists the recommended components and refers to the circuit of figure 1. the following sections describe how to select these components. mosfets the MAX1870a requires one p-channel mosfet and one n-channel mosfet. component substitutions are permissible as long as the on-resistance and gate charge are equal or lower and the voltage, current, and power-dissipation ratings are high enough. if using a lower-power application, scale down the mosfets with lower gate charge and the mosfet? on-resistance can be scaled up. for example, in a system designed to deliver half as much current, mosfets selected with twice the on-resistance and half as much gate charge ensure equal or better efficiency, and reduce size and cost. if resistive losses dominate, it can be possible to reduce the gate charge at the cost of on-resistance and still achieve a similar efficiency. make sure that the linear regulators can drive the selected mosfets. the average current required to drive a given mosfet is: i ldo = q gm2 x f switch i vhn = q gm1 x f switch where f switch is 400khz (typ). gm pwm r ogms c cs ccs cls css gms a css cssp cssn/ csss rs1_ figure 12. ccs simplified loop diagram cci loop response magnitude (db) -90 -45 0 80 60 40 20 -40 -20 0 100 1k 10 0.1 100k frequency (hz) ccs loop response magnitude (db) -90 -45 0 80 60 40 20 -40 -20 0 100 1k 10 0.1 100k 10m frequency (hz) phase phase mag mag figure 13. cci and ccs loop response
MAX1870a step-up/step-down li+ battery charger ______________________________________________________________________________________ 27 mosfet power dissipation table 5 shows the resistive losses and switching losses in each of the mosfets during either step-up or step- down operation. table 5 provides a first-order estimate, but does not consider second-order effects such as ripple current or nonlinear gate drive. for typical applications where v batt / 2 < v in < 2 x v batt , the resistive losses are primarily dissipated in m1 since m2 operates at a lower duty cycle. switching loss- es are dissipated in m1 when in step-down mode and in m2 when in step-up mode. ratio the mosfets so that resistive losses roughly equal switching losses when at maximum load and typical input/output conditions. the resistive loss equations are a good approximation in hybrid mode (v in near v batt ). both m1 and m2 switch- ing losses apply in hybrid mode. switching losses can become a heat problem when the maximum ac adapter voltage is applied in step-down operation or minimum ac adapter voltage is applied with a maximum battery voltage. this behavior occurs because of the squared term in the cv 2 f switching-loss equation. table 5 provides only an estimate and is not a substitute for breadboard evaluation. inductor selection select the inductor to minimize power dissipation in the mosfets, inductor, and sense resistors. to optimize resistive losses and rms inductor current, set the lir (inductor current ripple) to 0.3. because the maximum resistive power loss occurs at the step-up boundary of hybrid mode, select lir for operating in this mode. select the inductance according to the following equation: larger inductance values can be used; however, they contribute extra resistance that can reduce efficiency. smaller inductance values increase rms currents and can also reduce efficiency. saturation current rating the inductor must have a saturation current rating high enough so it does not saturate at full charge, maximum output voltage, and minimum input voltage. in step-up operation, the inductor carries a higher current than in step-down operation with the same load. calculate the inductor saturation current rating by the following equation: input-capacitor selection the input capacitor must meet the ripple current requirement (i rms ) imposed by the switching currents. nontantalum chemistries (ceramic, aluminum, or os- i vxi v txv x v v xl sat out max chg max in min in min in min out max + ? ? ? ? ? ? ? __ _ _ _ _ 1 2 l xv xt lir i in chg = 2 min table 4. component list designation part specifications inductors l1 sumida cdrh104r-100 sumida cdrh104r-7r0 sumida cdrh104r-5r2 sumida cdrh104r-3r8 10?, 4.4a, 35m power inductor 7?, 4.8a, 27m power inductor 5.2?, 5.5a, 22m power inductor 3.8?, 6a, 13m power inductor p-channel mosfets m1 siliconix si4435dy fairchild fdc602p fairchild fds4435a fairchild fdw256p p-fet 35m , q g = 17nc, v dsmax = 30v, 8-pin so p-fet 35m , q g = 14nc, v dsmax = 20v, 6-pin supersot p-fet 25m , q g = 21nc, v dsmax = 30v, 8-pin so p-fet 20m , q g = 28nc, v dsmax = 30v, 8-pin tssop n/p-channel mosfet pairs m1/m2 fairchild fdw2520c (8-pin tssop) n-fet 18m , q g = 14nc, v dsmax = 20v, p-fet 35m , q g = 14nc, v dsmax = 20v n-channel mosfets m2 irf7811w n-fet, 9m , q g = 18nc, v dsmax = 30v, 8-pin so
MAX1870a step-up/step-down li+ battery charger 28 ______________________________________________________________________________________ con) are preferred due to their resilience to power-up surge currents. the input capacitors should be sized so that the temper- ature rise due to ripple current in continuous conduction does not exceed approximately 10?. choose a capaci- tor with a ripple current rating higher than 0.5 x i chg . output-capacitor selection the output capacitor absorbs the inductor ripple current in step-down mode, or a peak-to-peak ripple current equal to the inductor current when in step-up or hybrid mode. as such, both capacitance and esr are impor- tant parameters in specifying the output capacitor. the actual amplitude of the ripple is the combination of the two. ceramic devices are preferable because of their resilience to surge currents. the worst-case output ripple occurs during hybrid mode when the input voltage is at its minimum. see the typical operating characteristics . select a capacitor that can handle 0.5 x i chg x v batt / v in while keeping the rise in capacitor temperature less than 10c. also, select the output capacitor to tolerate the surge current delivered from the battery when it is initially plugged into the charger. battery-removal response upon battery removal, the MAX1870a continues to reg- ulate a constant inductor current until the battery volt- age, v batt , exceeds the regulation threshold. the MAX1870a? response time depends on the bandwidth of the ccv loop, f co (see the voltage loop compensation section). for applications where battery overshoot is critical, either increase c out or increase f co by increasing r cv . see battery insertion and removal in the typical operating characteristics . system load transient the MAX1870a battery charger features a very fast response time to system load transients. since the input current loop is configured as a single-pole sys- tem, the MAX1870a responds quickly to system load transients (see the system load-transient response graph in the typical operating characteristics ). this reduces the risk of tripping the overcurrent threshold of the wall adapter and minimizes requirements for adapter oversizing. table 5. mosfet resistive and switching losses step-down mode step-up mode designation dc losses m1 d4 0 m2 0 d3 i chg x v diode i chg x v diode switching losses m1 0 d4 0 0 m2 0 d3 0 0 note: c lx is the total parasitic capacitance at the drain terminals of m1 and m2. i gate is the peak gate-drive source/sink current of m1 or m2. v v xi xr batt dcin chg ds on ? ? ? ? ? ? 2 () v v xi xr batt dcin chg ds on ? ? ? ? ? ? 2 () 1 ? ? ? ? ? ? ? v v xi v batt dcin chg diode 1 2 ? ? ? ? ? ? ? ? ? ? ? ? ? v v x v v xi xr dcin batt batt dcin chg ds on () vxcxfi i dcin max lx sw chg gate () 2 vxcxfi ixv batt max lx sw chg gate dcin max () () 3
MAX1870a step-up/step-down li+ battery charger ______________________________________________________________________________________ 29 layout and bypassing bypass dcin with a 1? to ground (figure 1). optional diodes d1 and d2 protect the MAX1870a when the dc power-source input is reversed. a signal diode for d1 is adequate because dcin only powers the ldo and the internal reference. good pc board layout is required to achieve specified noise, efficiency, and stable perfor- mance. the pc board layout artist must be given explicit instructions?referably, a pencil sketch show- ing the placement of the power-switching components and high-current routing. refer to the pc board layout in the MAX1870a evaluation kit for examples. a ground plane is essential for optimum performance. in most applications, the circuit is located on a multilayer board, and full use of the four or more copper layers is recommended. use the top layer for high-current con- nections (pgnd, dhi, vhp, vhn, blkp, and dlov), the bottom layer for quiet connections (cssp, cssn, csss, csip, csin, ref, ccv, cci, ccs, dcin, ldo and gnd), and the inner layers for an uninterrupted ground plane. use the following step-by-step guide: 1) place the high-power connections first, with their grounds adjacent: ? minimize the current-sense resistor trace lengths, and ensure accurate current sensing with kelvin connections. use independent branches for cssp, csss, cssn, csip, and csin. ? minimize ground trace lengths in the high-current paths. ? minimize other trace lengths in the high-current paths. ? use >5mm wide traces for high-current paths. ideally, surface-mount power components are flush against one another with their ground terminals almost touching. these high-current grounds are then connect- ed to each other with a wide, filled zone of top-layer cop- per, so they do not go through vias. other high-current paths should also be minimized, but focus primarily on short ground and current-sense connections to eliminate about 90% of all pc board layout problems. 2) place the ic and signal components. keep the main switching nodes (inductor connections) away from sensitive analog components (current-sense traces and ref capacitor). important: the ic must be no further than 10mm from the current-sense resis- tors. keep the gate-drive traces (dhi and dbst) shorter than 20mm, and route them away from the current-sense lines and ref. place ceramic bypass capacitors close to the ic. the bulk capacitors can be placed further away. bypass cssp, cssn, csin, and csip to analog gnd to reduce switching noise and maintain input-current and charger-current accu- racy. place the current-sense input filter capacitors under the part, connected directly to gnd. 3) use a single-point star ground placed directly below the part. connect the input ground trace, power ground (subground plane), and normal ground to this node. figure 14 shows a partial layout of the power path and components. refer to the ev kit data sheet for more information.
MAX1870a step-up/step-down li+ battery charger 30 ______________________________________________________________________________________ MAX1870a thin qfn top view 32 31 30 29 28 27 26 9 10 11 12 13 14 15 18 19 20 21 22 23 24 7 6 5 4 3 2 1 ref ldo cls gnd ccv cci ccs 8 gnd dcin cssp csss cssn vhp dhi vhn 25 dlov i.c. pgnd dbst i.c. i.c. blkp csip 17 csin shdn iinp 16 batt cells ictl vctl asns refin pin configuration np m1 m2 d3 d4 rs1a rs1b c8 c9 rs2 in batt pgnd load l1 figure 14. recommended layout for the MAX1870a chip information transistor count: 6484 process: bicmos
MAX1870a step-up/step-down li+ battery charger ______________________________________________________________________________________ 31 package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) qfn thin.eps d2 (nd-1) x e e d c pin # 1 i.d. (ne-1) x e e/2 e 0.08 c 0.10 c a a1 a3 detail a e2/2 e2 0.10 m c a b pin # 1 i.d. b 0.35x45 d/2 d2/2 l c l c e e l c c l k l l detail b l l1 e xxxxx marking h 1 2 21-0140 package outline, 16, 20, 28, 32, 40l thin qfn, 5x5x0.8mm -drawing not to scale- l e/2
package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) common dimensions 3.35 3.15 t2855-1 3.25 3.35 3.15 3.25 max. 3.20 exposed pad variations 3.00 t2055-2 3.10 d2 nom. min. 3.20 3.00 3.10 min. e2 nom. max. ne nd pkg. codes 1. dimensioning & tolerancing conform to asme y14.5m-1994. 2. all dimensions are in millimeters. angles are in degrees. 3. n is the total number of terminals. 4. the terminal #1 identifier and terminal numbering convention shall conform to jesd 95-1 spp-012. details of terminal #1 identifier are optional, but must be located within the zone indicated. the terminal #1 identifier may be either a mold or marked feature. 5. dimension b applies to metallized terminal and is measured between 0.25 mm and 0.30 mm from terminal tip. 6. nd and ne refer to the number of terminals on each d and e side respectively. 7. depopulation is possible in a symmetrical fashion. 8. coplanarity applies to the exposed heat sink slug as well as the terminals. 9. drawing conforms to jedec mo220, except exposed pad dimension for t2855-1, t2855-3, and t2855-6. notes: symbol pkg. n l1 e e d b a3 a a1 k 10. warpage shall not exceed 0.10 mm. jedec t1655-1 3.20 3.00 3.10 3.00 3.10 3.20 0.70 0.80 0.75 4.90 4.90 0.25 0.25 0 -- 4 whhb 4 16 0.35 0.30 5.10 5.10 5.00 0.80 bsc. 5.00 0.05 0.20 ref. 0.02 min. max. nom. 16l 5x5 3.10 t3255-2 3.00 3.20 3.00 3.10 3.20 2.70 t2855-2 2.60 2.60 2.80 2.70 2.80 l 0.30 0.50 0.40 -- - -- - whhc 20 5 5 5.00 5.00 0.30 0.55 0.65 bsc. 0.45 0.25 4.90 4.90 0.25 0.65 - - 5.10 5.10 0.35 20l 5x5 0.20 ref. 0.75 0.02 nom. 0 0.70 min. 0.05 0.80 max. -- - whhd-1 28 7 7 5.00 5.00 0.25 0.55 0.50 bsc. 0.45 0.25 4.90 4.90 0.20 0.65 - - 5.10 5.10 0.30 28l 5x5 0.20 ref. 0.75 0.02 nom. 0 0.70 min. 0.05 0.80 max. -- - whhd-2 32 8 8 5.00 5.00 0.40 0.50 bsc. 0.30 0.25 4.90 4.90 0.50 - - 5.10 5.10 32l 5x5 0.20 ref. 0.75 0.02 nom. 0 0.70 min. 0.05 0.80 max. 0.20 0.25 0.30 down bonds allowed no yes 3.10 3.00 3.20 3.10 3.00 3.20 t2055-3 3.10 3.00 3.20 3.10 3.00 3.20 t2055-4 t2855-3 3.15 3.25 3.35 3.15 3.25 3.35 t2855-6 3.15 3.25 3.35 3.15 3.25 3.35 t2855-4 2.60 2.70 2.80 2.60 2.70 2.80 t2855-5 2.60 2.70 2.80 2.60 2.70 2.80 t2855-7 2.60 2.70 2.80 2.60 2.70 2.80 3.20 3.00 3.10 t3255-3 3.20 3.00 3.10 3.20 3.00 3.10 t3255-4 3.20 3.00 3.10 no no no no no no no no yes yes yes yes 3.20 3.00 t1655-2 3.10 3.00 3.10 3.20 yes no 3.20 3.10 3.00 3.10 t1655n-1 3.00 3.20 3.35 3.15 t2055-5 3.25 3.15 3.25 3.35 yes 3.35 3.15 t2855n-1 3.25 3.15 3.25 3.35 no 3.35 3.15 t2855-8 3.25 3.15 3.25 3.35 yes 3.20 3.10 t3255n-1 3.00 no 3.20 3.10 3.00 l 0.40 0.40 ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** see common dimensions table 0.15 11. marking is for package orientation reference only. h 2 2 21-0140 package outline, 16, 20, 28, 32, 40l thin qfn, 5x5x0.8mm -drawing not to scale- 12. number of leads shown are for reference only. 3.30 t4055-1 3.20 3.40 3.20 3.30 3.40 ** yes 0.05 00.02 0.60 0.40 0.50 10 ----- 0.30 40 10 0.40 0.50 5.10 4.90 5.00 0.25 0.35 0.45 0.40 bsc. 0.15 4.90 0.25 0.20 5.00 5.10 0.20 ref. 0.70 min. 0.75 0.80 nom. 40l 5x5 max. 13. lead centerlines to be at true position as defined by basic dimension "e", 0.05. MAX1870a step-up/step-down li+ battery charger maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 32 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2005 maxim integrated products printed usa is a registered trademark of maxim integrated products, inc.

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